The authors proposes a distributed anomaly detection system using hierarchical temporal memory (HTM) that predicts the flow of data in real time to increase security for a vehicular controller area network bus. The HTM-based anomaly detection system achieved better results than systems based on recurrent neural networks and hidden Markov model detection.
The experimental paper explores theories of predictive coding by presenting mice with repeated sequences of images where novel images are occasionally substituted. Many of the findings have strong relationships to the characteristics of HTM Sequence Memory. The discussion section of this paper explores this relationship and includes a paragraph on one of our papers, “Why Neurons Have Thousands of Synapses, a Theory of Sequence Memory in Neocortex.”
This Master’s thesis explores the feasibility of a Hierarchical Temporal Memory (HTM) based game agent that can explore its environment and learn rewarding behaviors. The unsupervised agent learns action sequences with respect to a stimulated reward in real time, navigating a procedurally generated 3D environment and modeling the patterns that stream to its visual sensor.
This paper explores the feasibility of implementing Hierarchical Temporal Memory (HTM) on SpiNNaker, a fully programmable energy-efficient neuromorphic many core system. The paper makes a proposal for mapping the HTM model components to the SpiNNaker chip architecture. It also shows a prototypic implementation of this mapping that is successfully evaluated for different sets of model parameters.
This paper presents an extension of the BrainScaleS accelerated analog neuromorphic hardware model by supporting multicompartment models and non-linear dendrites. Using a 65 nm prototype Application Specific Integrated Circuit (ASIC), the system emulates different spike types observed in cortical pyramidal neurons: NMDA plateau potentials, calcium and sodium spikes. Dendritic NMDA spikes are an important component of HTM theory, and the authors use our paper as a motivation for developing the hardware.